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Allwinner /D1H /TWI[2] /TWI_DRV_DMA_CFG

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Interpret as TWI_DRV_DMA_CFG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0tx_trig0 (dma_tx_en)dma_tx_en 0rx_trig0dma_rx_en

Description

TWI_DRV DMA Configure Register

Fields

tx_trig
dma_tx_en
rx_trig
dma_rx_en

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data